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LF351
Wide bandwidth single JFET operational amplifiers
Features

Internally adjustable input offset voltage Low power consumption Wide common-mode (up to VCC+) and differential voltage range Low input bias and offset current Output short-circuit protection High input impedance JFET input stage Internal frequency compensation Latch up free operation High slew rate 16 V/s (typical)
D SO-8 (Plastic micro package) N DIP8 (Plastic package)
Description
These circuits are high speed JFET input single operational amplifiers incorporating well matched, high voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient.
Pin connections (top view)
1 2 3 4
8 7 6 5
1 - Offset null 1 2 - Inverting input 3 - Non-inverting input 4 - VCC5 - Offset null 2 6 - Output 7 - VCC+ 8 - N.C.
April 2008
Rev 2
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Schematics
LF351
1
Schematics
Figure 1. Schematic diagram
VCC
Non-inverting input Inverting input 100W 200W Output 100W 30k
8.2k
1.3k VCC Offset Null1
35k
1.3k
35k
100W
Offset Null2
Figure 2.
Input offset voltage null circuit
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LF351
Absolute maximum ratings and operating conditions
2
Table 1.
Symbol VCC Vi Vid Rthja
Absolute maximum ratings and operating conditions
Absolute maximum ratings
Parameter Supply voltage(1) Input voltage
(2) (3)
Value 18 15 30 125 85 40 41 Infinite -65 to +150 500 200 1.5
Unit V V V C/W
Differential input voltage
Thermal resistance junction to ambient(4) SO-8 DIP8 Thermal resistance junction to case(4) SO-8 DIP8 Output short-circuit duration(5)
Rthjc
C/W
Tstg
Storage temperature range HBM: human body model(6)
C V V kV
ESD
MM: machine model
(7)
CDM: charged device
model(8)
1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC+ and VCC-. 2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. 3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 4. Short-circuits can cause excessive heating and destructive dissipation. Values are typical. 5. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded 6. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 7. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 8. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins.
Table 2.
Symbol VCC Toper
Operating conditions
Parameter Supply voltage Operating free-air temperature range -55 to +125 LF151 LF251 6 to 32 -40 to +105 0 to +70 LF351 Unit V C
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Electrical characteristics
LF351
3
Table 3.
Symbol Vio DVio Iio Iib Avd SVR ICC Vicm CMR IOS
Electrical characteristics
Electrical characteristics at VCC = 15 V, Tamb = +25C (unless otherwise specified)
Parameter Input offset voltage (Rs = 10k) Tmin Tamb Tmax Input offset voltage drift Input offset current (1) Tmin Tamb Tmax Input bias current (1) Tmin Tamb Tmax Large signal voltage gain (RL = 2k Vo = 10V) , Tmin Tamb Tmax Supply voltage rejection ratio (RS = 10k) Tmin Tamb Tmax Supply current, no load Tmin Tamb Tmax Input common mode voltage range Common mode rejection ratio (RS = 10k) Tmin Tamb Tmax Output short-circuit current Tmin Tamb Tmax Output voltage swing RL = 2k RL = 10k Tmin Tamb Tmax RL = 2k RL = 10k , Slew rate, Vi = 10V, RL = 2k CL = 100pF, unity gain Rise time, Vi = 20mV, RL = 2k CL = 100pF, unity gain , Overshoot, Vi = 20mV, RL = 2k CL = 100pF, unity gain , Gain bandwidth product, f = 100kHz, Vin = 10mV, RL = 2k CL = 100pF , Input resistance Total harmonic distortion f= 1kHz, Av= 20dB, RL= 2k, CL=100pF, Vo= 2Vpp Equivalent input noise voltage RS = 100, f = 1KHz Phase margin 2.5 50 25 80 80 Min. Typ. Max. 3 10 5 20 200 86 1.4 11 +15 -12 70 70 10 10 10 12 10 12 12 16 0.1 10 4 1012 0.01 15 45 V/s s % MHz %
nV ----------Hz
Unit mV V/C
10 13
100 4 200 20
pA nA pA nA V/mV dB
3.4 3.4
mA V dB
86 40 60 60
mA
Vopp
12 13.5
V
SR tr Kov GBP Ri THD en m
Degrees
1. The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature.
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LF351
Electrical characteristics
Figure 3.
Maximum peak-to-peak output voltage versus frequency
Figure 4.
Maximum peak-to-peak output voltage versus frequency
Figure 5.
Maximum peak-to-peak output voltage versus frequency
Figure 6.
Maximum peak-to-peak output voltage versus free air temp.
Figure 7.
Maximum peak-to-peak output voltage versus load resistance
Figure 8.
Maximum peak-to-peak output voltage versus supply voltage
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Electrical characteristics
LF351
Figure 9.
Input bias current versus free air temperature
Figure 10. Large signal differential voltage amplification versus free air temp.
Figure 11. Large signal differential voltage amplification and phase shift versus frequency
Figure 12. Total power dissipation versus free air temperature
Figure 13. Supply current per amplifier versus Figure 14. Supply current per amplifier versus free air temperature supply voltage
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LF351
Electrical characteristics
Figure 15. Common mode rejection ratio versus free air temperature
Figure 16. Voltage follower large signal pulse response
Figure 17. Output voltage versus elapsed time Figure 18. Equivalent input noise voltage versus frequency
Figure 19. Total harmonic distortion versus frequency
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Parameter measurement information
LF351
4
Parameter measurement information
Figure 21. Gain-of-10 inverting amplifier
Figure 20. Voltage follower
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LF351
Typical application
5
Typical application
Figure 22. Square wave oscillator (0.5 Hz)
Figure 23. High Q notch filter
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Package information
LF351
6
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com.
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LF351
Package information
6.1
DIP8 package information
Figure 24. DIP8 package mechanical drawing
Table 4.
DIP8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b b2 c D E E1 e eA eB L 2.92 0.38 2.92 0.36 1.14 0.20 9.02 7.62 6.10
Millimeters Typ. Max. 5.33 0.015 3.30 0.46 1.52 0.25 9.27 7.87 6.35 2.54 7.62 10.92 3.30 3.81 0.115 4.95 0.56 1.78 0.36 10.16 8.26 7.11 0.115 0.014 0.045 0.008 0.355 0.300 0.240 Min.
Inches Typ. Max. 0.210
0.130 0.018 0.060 0.010 0.365 0.310 0.250 0.100 0.300
0.195 0.022 0.070 0.014 0.400 0.325 0.280
0.430 0.130 0.150
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Package information
LF351
6.2
SO-8 package information
Figure 25. SO-8 package mechanical drawing
Table 5.
SO-8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b c D E E1 e h L k ccc 0.25 0.40 1 0.10 1.25 0.28 0.17 4.80 5.80 3.80
Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.48 0.23 4.90 6.00 3.90 1.27 0.50 1.27 8 0.10 0.010 0.016 1 5.00 6.20 4.00 0.011 0.007 0.189 0.228 0.150 Min.
Inches Typ. Max. 0.069 0.010
0.019 0.010 0.193 0.236 0.154 0.050 0.020 0.050 8 0.004 0.197 0.244 0.157
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LF351
Ordering information
7
Ordering information
Table 6. Order codes
Temperature range Package DIP8 -55C, +125C SO-8 DIP8 -40C, +105C SO-8 DIP8 0C, +70C SO-8 Packing Tape Tape or Tape & reel Tape Tape or Tape & reel Tape Tape or Tape & reel Marking LF151N 151 LF251N 251 LF351N 351
Order code LF151N LF151D LF151DT LF251N LF251D LF251DT LF351N LF351D LF351DT
8
Revision history
Table 7.
Date 17-May-2001 28-April-2008
Document revision history
Revision 1 2 Initial release. Updated document format. Changes
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LF351
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